Tutorial: Build circuits with code¶

Before starting this tutorial

You should have installed JITX and created your first design.

This document contains all code examples and product actions from Quickstart 2 in a format that's easy to follow along with. Use it as a companion to the video tutorial.

Resources¶

Awesome JITX is a collection of shared libraries
Startup code: the JITX Project created created from Tutorial: Your first design
Final tutorial code: the JITX Project created from this Tutorial: Build circuits with code

Development Tips¶

Restart terminal after modifying slm.toml
Use Ctrl+Enter to run current file
Verify package names and imports match project structure

1. Project Setup¶

Update Main Module¶

First, rename the default module in main.stanza:

BeforeAfter

pcb-module my-design:

pcb-module top-level:

Update the main module reference:

BeforeAfter

set-main-module(my-design)

set-main-module(top-level)

2. Creating the Communications Core Time 1:26 ¶

A. Initial Module Setup¶

Create a communications-core module

main.stanza

pcb-module communications-core :
  ; Components will be added here

B. Add a zener diode from the database¶

Click "Find Components" in the JITX sidebar
- Enter "MMSZ4689T1G" in the Component Search panel
- Open the arrow next to an MPN found to open the Detail view
- Click on the "Copy to clipboard" button
  - The clipboard would contain create-part(mpn = "MMSZ4689T1G", manufacturer = "ON Semiconductor")
Add an instance named zener of the component

main.stanza

pcb-module communications-core :
  inst zener : create-part(mpn = "MMSZ4689T1G", manufacturer = "ON Semiconductor")

C. Instantiate in Top Level:¶

Remove all the code in the top-evel module and then add an instance of the communications-core

main.stanza

pcb-module top-level :
  inst core : communications-core

- See that the part is added to the BOM Visualizer panel and the Board view

'e' to Examine a component

Click on the part in the Board view to select it. Type 'e' to see its instance name

3. USB Interface Integration at Time 3.42 ¶

A. Add dependency for the `Connectors` Library¶

Find the Connecotors library from the Awesome JITX repository
Copy the line under the Installation instruction o slm.toml:

Whenever slm.toml is changed

Kill the terminal (Click on the trash can icon) so the next Ctrl+Enter will update the SLM libraries.

slm.toml

connectors = { git = "JITx-Inc/connectors", version = "0.4.1" }

B. Add USB Connector¶

In the Connectors Library README, find USB 2.0 High-Speed Interface
Copy the code and add it to the communications-core module

main.stanza

inst usb-if : connectors/components/USB/USBTypeC/USBC-HighSpeed-Iface()

C. Connect `zener` to USB Power¶

In the Ports sub-section under USB 2.0 High-Speed Interface, there are two ports: port USB of type usb-data and port VDD-USB of type power

power bundle is from the JSL

Common bundles like power are provided as a part of the JITX Standard Library (JSL)

  USB : usb-data
  VDD-USB : power

Find the ports in the power bundle

Search for "power" under the Documentation section in the JITX side panel. - Open the page for Power Bundle to see that the bundle has pins V+ and V-.

Connecting the A and K pins of the diode zener to V- and V+ of the USB.

Check connections

Contrl+Enter from main.stanza and then check the Board view to check the connections

main.stanza

net (zener.A usb-if.VDD-USB.V-)
net (zener.K usb-if.VDD-USB.V+)

4. Controller Module Development at Time 7:41 ¶

A. Create the Controller component¶

Name the package ethernet-io/controller
create the controller module

src/controller.stanza

#use-added-syntax(jitx)
defpackage ethernet-io/controller :
  import core
  import jitx
  import jitx/commands
  import jitx/parts
  import helpers
  import jsl

public pcb-module controller :
  name = "MCU"

B. Add to the Project Configuration¶

stanza.proj

packages ethernet-io/* defined-in "src/"

C. Import and instantiate¶

Add an import statement for the controller page

main.stanza

import ethernet-io/controller

- Instantiate the controller under the communications-core module

main.stanza

inst ctl : controller

5, FTDI Integration at Time 9:47 ¶

A. Add the FTDI Library¶

Find the FTDI repository from the Awesome JITX repository - Copy the line under the Installation instruction to slm.toml:

Whenever slm.toml is changed

Kill the terminal (Click on the trash can icon) so the next Ctrl+Enter will update the SLM libraries.

slm.toml

FTDI = { git = "JITx-Inc/FTDI", version = "0.3.3" }

B. Add the "Application circuit" for the FT2232HL component¶

Copy the Debug Interface code to the controller module

src/controller.stanza

public pcb-module controller :
  name = "MCU"
  inst debug-if : FTDI/DebugIF/circuit(
    FTDI/components/FT2232HL/FT2232H-MPSSE,
    FTDI/components/FT2232HL/FT2232H-RS232,
    R-query = R-query,
    C-query = C-query
    )

6. Debug Interface Connections at Time 10:51 ¶

A. Add ports to the `controller` module¶

src/controller.stanza

public pcb-module controller :
   name = "MCU"
   port rail-3v3 : pwoer
   port USB : usb-data
   port VDD-USB : power

B. Connect circuitry inside the `controller` module to those ports¶

src/controller.stanza

  net (rail-3v3 debug-if.VDD-3v3)
  net (VDD-USB debug-if.VDD-USB)
  net (USB debug-if.USB)

C. Under `communications-core` module, add nets to connect to the bundle ports `USB` and `VDD-USB` of the `controller` module¶

src/controller.stanza

  inst ctl : controller
  net (ctl.USB usb-if.USB)
  net (ctl.VDD-USB usb-if.VDD-USB)

7. EEPROM Component Creation at Time 13:10 ¶

A. Create Component¶

Click on "Create Component" in the JITX side panel
- Select the parent folder as src/components
- When prompted for a name, enter "MC-93LC46CT"
A file src/components/MC-93LC46CT.stanza is created with a basic template for a component

src/components/MC-93LC46CT.stanza

#use-added-syntax(jitx)
defpackage components/MC-93LC46CT:
  import core
  import jitx
  import jitx/commands
  import jitx/parts
  import jsl

public pcb-component component :
  name = "MC-93LC46CT"
  description = "1K 2.5V Microwire Serial EEPROM, SOIC-8 Package"
  mpn = "93LC46CT-I/SN"
  manufacturer = "Microchip Technology"
  datasheet = "https://ww1.microchip.com/downloads/en/DeviceDoc/20001749K.pdf"
  reference-prefix = "U"

  pin-properties:
    [pin:Ref  | pads:Int | side:Dir ]
    [CS       | 1        | Left     ] ; Chip Select
    [CLK      | 2        | Left     ] ; Serial Clock
    [DI       | 3        | Left     ] ; Data Input  
    [DO       | 4        | Left    ] ; Data Output
    [VSS      | 5        | Left     ] ; Ground
    [VCC      | 8        | Right       ] ; Power Supply
    [ORG      | 6        | Right    ] ; Memory Configuration
    [NC       | 7        | Right    ] ; No Connection

  val box = BoxSymbol(self)
  val symb = create-symbol(box)
  assign-symbol(symb)

  val pkg = SOIC-N(
    num-leads = 8,
    lead-span = min-max(5.8, 6.2),
    package-length = min-max(4.8, 5.0)
    density-level = DensityLevelA
  )
  val lp = create-landpattern(pkg)
  assign-landpattern(lp)

8. Create the EEPROM Module at Time 17.56 ¶

Instantiate the EEPROM module and connect to its ports.

Find ports in the microwire type

Look for microwire in the Documentation section of the JITX side panel to find the pins in the microwire bundle

src/components/MC-93LC46CT.stanza

public pcb-module module :
  port VDD-3v3 : power
  port cfg : microwire-4()

  ;Map the ports to the circuitry inside the module
  inst EEPROM : components/MC-93LC46CT/component
  net (EEPROM.CS cfg.cs)
  net (EEPROM.CLK cfg.clk)
  net (EEPROM.DO cfg.do)
  net (EEPROM.DI cfg.di)
  net (EEPROM.VCC VDD-3v3.V+)
  net (EEPROM.VSS VDD-3v3.V-)

9. Add parametric parts at Time 19:57 ¶

A. Add package dependency¶

Add the dependency for jitx/parts

src/components/MC-93LC46CT.stanza

import jitx/parts

B. Add parametric resistors and capacitors¶

src/components/MC-93LC46CT.stanza

  ;Add a pull-up resitor
  insert-resistor(
    EEPROM.ORG EEPROM.VCC  ; pins
    helpers/R-query        ; helper function used to choose parts
    resistance = 10.e3
  )
  ;Add a bypass capacitor
  insert-capacitor(
    EEPROM.VCC EEPROM.VSS
    helpers/C-query
    capacitance = 2.2e-6
    short-trace? = true
  )

10. Integration of EEPROM¶

A. Add an instance of EEPROM to the `controller` module:¶

src/controller.stanza

inst EEPROM : components/MC-93LC46CT/module
net (EEPROM.VDD-3v3 rail-3v3)
net (EEPROM.cfg debug-if.CFG)

B. Add to the Project Configuration¶

stanza.proj

package components/MC-93LC46CT defined-in "src/components/MC-93LC46CT.stanza"

Key Concepts Learned¶

Component Management
- Adding from database
- Creating custom components
- Using library code
Circuit Organization
- Module hierarchy
- File structure
- Package management
Connectivity
- Using nets
- Port creation
- Interface bundles
Library Usage
- Adding dependencies
- Importing modules
- Using parametric circuits

For your reference, the JITX Project created from this Quickstart tutorial is available.

Continue to the next tutorial Tutorial: Organizing a schematic

Tutorial: Build circuits with code¶

Resources¶

Development Tips¶

1. Project Setup¶

Update Main Module¶

2. Creating the Communications Core Time 1:26¶

A. Initial Module Setup¶

B. Add a zener diode from the database¶

C. Instantiate in Top Level:¶

3. USB Interface Integration at Time 3.42¶

A. Add dependency for the Connectors Library¶

B. Add USB Connector¶

C. Connect zener to USB Power¶

4. Controller Module Development at Time 7:41¶

A. Create the Controller component¶

B. Add to the Project Configuration¶

C. Import and instantiate¶

5, FTDI Integration at Time 9:47¶

A. Add the FTDI Library¶

B. Add the "Application circuit" for the FT2232HL component¶

6. Debug Interface Connections at Time 10:51¶

A. Add ports to the controller module¶

B. Connect circuitry inside the controller module to those ports¶

C. Under communications-core module, add nets to connect to the bundle ports USB and VDD-USB of the controller module¶

7. EEPROM Component Creation at Time 13:10¶

A. Create Component¶

8. Create the EEPROM Module at Time 17.56¶

9. Add parametric parts at Time 19:57¶

A. Add package dependency¶

B. Add parametric resistors and capacitors¶

10. Integration of EEPROM¶

A. Add an instance of EEPROM to the controller module:¶

B. Add to the Project Configuration¶

Key Concepts Learned¶

2. Creating the Communications Core Time 1:26 ¶

3. USB Interface Integration at Time 3.42 ¶

A. Add dependency for the `Connectors` Library¶

C. Connect `zener` to USB Power¶

4. Controller Module Development at Time 7:41 ¶

5, FTDI Integration at Time 9:47 ¶

6. Debug Interface Connections at Time 10:51 ¶

A. Add ports to the `controller` module¶

B. Connect circuitry inside the `controller` module to those ports¶

C. Under `communications-core` module, add nets to connect to the bundle ports `USB` and `VDD-USB` of the `controller` module¶

7. EEPROM Component Creation at Time 13:10 ¶

8. Create the EEPROM Module at Time 17.56 ¶

9. Add parametric parts at Time 19:57 ¶

A. Add an instance of EEPROM to the `controller` module:¶